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With higher and higher pin counts on devices such as FPGAs and DSPs it has become more complicated to represent devices on a single sheet of schematics and splitting symbols has become necessary. The time taken to create parts for these sometimes huge devices has risen, and there is the added complication of allocating pins in the pcb design for ease of layout. To alleviate this problem we use I/O Designer which allows straight-forward pin mapping of complex FPGAs, speedy and less error prone part/symbol creation and powerful signal manipulation between pcb and FPGA.
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